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A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

 

A  -  TOP

ADC - Add memory and Carry to Accumulator
mnemonic address mode op code # bytes # cycles N Z C I D V
ADC

Immediate

69 2 2 x x x x

Zero Page

65 2 3 x x x x

Zero Page, X

75 2 4 x x x x

Absolute

6D 3 4 x x x x

Absolute, X

7D 3 4 x x x x

Absolute, Y

79 3 4 x x x x

Indirect, X

61 2 6 x x x x

Indirect, Y

71 2 5 x x x x
 

AND - Logically AND Memory with Accumulator

mnemonic address mode op code # bytes # cycles N Z C I D V
AND Immediate 29 2 2 x x
Zero Page 25 2 3 x x
Zero Page, X 35 2 4 x x
Absolute 2D 3 4 x x
Absolute, X 3D 3 4 x x
Absolute, Y 39 3 4 x x
Indirect, X 21 2 6 x x
Indirect, Y 31 2 5 x x
 
ASL - Shift Left (Memory or Accumulator)
mnemonic address mode op code # bytes # cycles N Z C I D V
ASL Accumulator 0A 1 2 x x x
Zero Page 06 2 5 x x x
Zero Page, X 16 2 6 x x x
Absolute 0E 3 6 x x x
Absolute, X 1E 3 7 x x x
 

B  -  TOP

BCC - Branch if Carry Flag Cleared
mnemonic address mode op code # bytes # cycles N Z C I D V
BCC Relative 90 2 2
 
BCS - Branch if Carry Flag is Set
mnemonic address mode op code # bytes # cycles N Z C I D V
BCS Relative B0 2 2
 
BEQ - Branch if result equal to zero.
mnemonic address mode op code # bytes # cycles N Z C I D V
BEQ Relative F0 2 2
 
BIT - Bit test
mnemonic address mode op code # bytes # cycles N Z C I D V
BIT Zero Page 24 2 3 (a) x (b)
Absolute 2C 3 4 (a) x (b)
 
BMI - Branch if result is minus
mnemonic address mode op code # bytes # cycles N Z C I D V
BMI relative 30 2 2
 
BNE - Branch if result is ont equal to zero
mnemonic address mode op code # bytes # cycles N Z C I D V
BNE Relative D0 2 2
 
BPL - Branch if result is plus
mnemonic address mode op code # bytes # cycles N Z C I D V
BPL Relative 10 2 2
 
BRK - Break command
mnemonic address mode op code # bytes # cycles N Z C I D V
BRK Implied 00 1 7 1
 
BVC - Branch if oveflow flag (V) is cleared
mnemonic address mode op code # bytes # cycles N Z C I D V
BVC Relative 50 2 2
 
BVS - Branch if overflow flag (V) is set
mnemonic address mode op code # bytes # cycles N Z C I D V
BVS Relative 70 2 2
 

C  -  TOP

CLS - Clear carry flag
mnemonic address mode op code # bytes # cycles N Z C I D V
CLC Relative 18 1 2 0
 
CLD - Clear decimal mode flag
mnemonic address mode op code # bytes # cycles N Z C I D V
CLD Relative D8 1 2 0
 
CLI - Clear interrupt disable flag
mnemonic address mode op code # bytes # cycles N Z C I D V
CLI Relative 58 1 2 0
 
CLV - Clear overflow flag
mnemonic address mode op code # bytes # cycles N Z C I D V
CLV Relative B8 1 2 0
 
CMP - Compare accumulator with memory
mnemonic address mode op code # bytes # cycles N Z C I D V
CMP Immediate C9 2 3 x x x
Zero Page C5 2 3 x x x
Zero Page, X D5 2 4 x x x
Absolute CD 3 4 x x x
Absolute, X DD 3 4 x x x
Absolute, Y D9 3 4 x x x
Indirect, X C1 2 6 x x x
Indirect, Y D1 2 5 x x x
 
CPX - Compare the X register with memory
mnemonic address mode op code # bytes # cycles N Z C I D V
CPX Immediate E0 2 2 x x x
Zero Page E4 2 3 x x x
Absolute EC 3 4 x x x
 
CPY - Compare Y register with memory
mnemonic address mode op code # bytes # cycles N Z C I D V
CPY Immediate C0 2 2 x x x
Zero Page C4 2 3 x x x
Absolute CC 3 4 x x x
 

D  -  TOP

DEC - Decrement memory contents
mnemonic address mode op code # bytes # cycles N Z C I D V
DEC Zero Page C6 2 5 x x
Zero Page, X D6 2 6 x x
Absolute CE 3 6 x x
Absolute, X DE 3 7 x x
 
DEX - Decrement the X register
mnemonic address mode op code # bytes # cycles N Z C I D V
DEX Implied CA 1 2 x x
 
DEY - Decrement the Y register
mnemonic address mode op code # bytes # cycles N Z C I D V
DEY Implied 88 1 2 x x
 

E  -  TOP

EOR -   Increment memory data
mnemonic address mode op code # bytes # cycles N Z C I D V
EOR Immediate 49 2 2 x x
Zero Page 45 2 3 x x
Zero Page, X 55 2 4 x x
Absolute 4D 3 4 x x
Absolute, X 5D 3 4 x x
Absolute, Y 59 3 4 x x
Indirect, X 41 2 6 x x
Indirect, Y 51 2 5 x x
 

I  -  TOP

INC - Increment memory data
mnemonic address mode op code # bytes # cycles N Z C I D V
INC Zero Page E6 2 5 x x
Zero Page, X F6 2 6 x x
Absolute EE 3 6 x x
Absolute, X FE 3 7 x x
 
INX - Incrememtn the X register
mnemonic address mode op code # bytes # cycles N Z C I D V
INX Implied E8 1 2 x x
 
INY - Increment the Y register
mnemonic address mode op code # bytes # cycles N Z C I D V
INY Implied C8 1 2 x x
 

J  -  TOP

JMP - Unconditional Jump
mnemonic address mode op code # bytes # cycles N Z C I D V
JMP Absolute 4C 3 3
Indirect 2C 3 5
 
JSR - Jump to subroutine
mnemonic address mode op code # bytes # cycles N Z C I D V
JSR Absolute 20 3 6
 

L  -  TOP

LDA - Load accumulator from memory
mnemonic address mode op code # bytes # cycles N Z C I D V
LDA Immediate A9 2 2 x x
Zero Page A5 2 3 x x
Zero Page, X B5 2 4 x x
Absolute AD 3 4 x x
Absolute, X BD 3 4 x x
Absolute, Y B9 3 4 x x
Indirect, X A1 2 6 x x
Indirect, Y B1 2 5 x x
 
LDX - Load X from memory
mnemonic address mode op code # bytes # cycles N Z C I D V
LDX Immediate A2 2 2 x x
Zero Page A6 2 3 x x
Zero Page, Y B6 2 4 x x
Absolute AE 3 4 x x
Absolute, Y BE 3 4 x x
 
LDY - Load Y from memory
mnemonic address mode op code # bytes # cycles N Z C I D V
LDY Immediate A0 2 2 x x
Zero Page A4 2 3 x x
Zero Page, X B4 2 4 x x
Absolute AC 3 4 x x
Absolute, X BC 3 4 x x
 
LSR - Shift right (memory or accumulator)
mnemonic address mode op code # bytes # cycles N Z C I D V
LSR Accumulator 4A 1 2 0 x x
Zero Page 46 2 5 0 x x
Zero Page, X 56 2 6 0 x x
Absolute 4E 3 6 0 x x
Absolute, X 5E 3 7 0 x x
 

N  -  TOP

NOP - No Operation
mnemonic address mode op code # bytes # cycles N Z C I D V
NOP Implied EA 1 2
 

O  -  TOP

ORA - OR memory with accumulator
mnemonic address mode op code # bytes # cycles N Z C I D V
ORA Immediate 09 2 2 x x
Zero Page 05 2 3 x x
Zero Page, X 15 2 4 x x
Absolute 0D 3 4 x x
Absolute, X 1D 3 4 x x
Absolute, Y 19 3 4 x x
Indirect, X 01 2 6 x x
Indirect, Y 11 2 5 x x
 

O  -  TOP

PHA - Push accumulator on stack
mnemonic address mode op code # bytes # cycles N Z C I D V
PHA Implied 48 1 3
 
PHP - Push processor status register on stack
mnemonic address mode op code # bytes # cycles N Z C I D V
PHP Implied 08 1 3
 
PLA - Pull accumulator from stack
mnemonic address mode op code # bytes # cycles N Z C I D V
PLA Implied 68 1 4
 
ROL - Rotate left (accumulator or memory)
mnemonic address mode op code # bytes # cycles N Z C I D V
ROL Accumulator 2A 1 2 x x x
Zero Page 26 2 5 x x x
Zero Page, X 36 2 6 x x x
Absolute 2E 3 6 x x x
Absolute, X 3E 3 7 x x x
 
ROR - Rotate right (accumulator or memory)
mnemonic address mode op code # bytes # cycles N Z C I D V
ROR Accumulator 6A 1 2 x x x
Zero Page 66 2 5 x x x
Zero Page, X 76 2 6 x x x
Absolute 6E 3 6 x x x
Absolute, X 7E 3 7 x x x
 
RTI - Return from interrupt
mnemonic address mode op code # bytes # cycles N Z C I D V
RTI Implied 40 1 6 re s t o r ed
 
RTS - Return from subroutine
mnemonic address mode op code # bytes # cycles N Z C I D V
RTS Implied 60 1 6
 

S  -  TOP

SBC - Subtract memory from accumulator with borrow
mnemonic address mode op code # bytes # cycles N Z C I D V
SBC Immediate E9 2 2 x x x x
Zero Page E5 2 3 x x x x
Zero PAge, X F5 2 4 x x x x
Absolute ED 3 4 x x x x
Absolute, X FD 3 4 x x x x
Absolute, Y F9 3 4 x x x x
Indirect, X E1 2 6 x x x x
Indirect, Y F1 2 5 x x x x
 
SEC - Set carry flag
mnemonic address mode op code # bytes # cycles N Z C I D V
SEC Implied 38 1 2 1
 
SED - Set decimal mode flag
mnemonic address mode op code # bytes # cycles N Z C I D V
SED Implied F8 1 2 1
 
SEI - Set interrupt disable flag
mnemonic address mode op code # bytes # cycles N Z C I D V
SEI Implied 78 1 2 1
 
STA - Store acumulator in memory
mnemonic address mode op code # bytes # cycles N Z C I D V
STA Zero Page 85 2 3
Zero Page, X 95 2 4
Absolute 8D 3 4
Absolute, X 9D 3 5
Absolute, Y 99 3 5
Indirect, X 81 2 6
Indirect, Y 91 2 6
 
STX - Store X register in memory
mnemonic address mode op code # bytes # cycles N Z C I D V
STX Zero Page 86 2 3
Zero Page, Y 96 2 4
Absolute 8E 3 4
 
STY - Store Y register in memory
mnemonic address mode op code # bytes # cycles N Z C I D V
STY Zero Page 84 2 3
Zero Page, X 94 2 4
Absolute 8C 3 4
 

T  -  TOP

TAX - Transfer accumulator to X
mnemonic address mode op code # bytes # cycles N Z C I D V
TAX Implied AA 1 2 x x
 
TAY - Transfer accumulator to Y
mnemonic address mode op code # bytes # cycles N Z C I D V
TAY Implied A8 1 2 x x
 
TSX - Transfer the stack pointer to the X register
mnemonic address mode op code # bytes # cycles N Z C I D V
TSX Implied BA 1 2 x x
 
TXA - Transfer X to the accumulator
mnemonic address mode op code # bytes # cycles N Z C I D V
TXA Implied 8A 1 2 x x
 
TXS - Transfer X to the stack pointer
mnemonic address mode op code # bytes # cycles N Z C I D V
TXS Implied 9A 1 2
 
TYA - OR memory with accumulator
mnemonic address mode op code # bytes # cycles N Z C I D V
TYA Implied 98 1 2 x x
 

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